10Gb/s 850nm Multi-mode SFP+ Transceiver

PRODUCT FEATURES

• 10Gb/s serial optical interface compliant to 802.3ae 10GBASE-SR
• 850nm VCSEL transmitter, PIN photo-detector
• Duplex LC connector
• Metal enclosure, for lower EMI
• Electrical interface compliant to SFF-8431

specifications for 10 Gigabit “SFP+”

• 2-wire interface for management

specifications compliant with SFF 8472

• Single 3.3V power supply
• Operating temperature range:-5°C to 70°C

APPLICATIONS

10GBASE-SR/SW 10G Ethernet

STANDARD

• Compliant with SFF-8472 SFP+ MSA.
• Compliant to SFP+ SFF-8431 and SFF-8432.
• Compliant to 802.3ae 10GBASE-SR.
• RoHS Compliant.

PRODUCT SELECTION

DSPM85192LMS

Absolute Maximum Ratings

Electrical Characteristics (Tcase = -5 to 70℃, VCC = 3.14 to 3.46Volts)

Notes:

1. Connected directly to TX data input pins. AC coupled thereafter.
2. Or open circuit.
3. Into 100 ohms differential termination.
4. 20 – 80 %
5. Loss Of Signal is LVTTL. Logic 0 indicates normal operation; logic 1 indicates no signal detected.
6. Receiver sensitivity is compliant with power supply sinusoidal modulation of 20 Hz to 1.5 MHz up to specified value applied through the recommended power supply filtering network.

Optical Characteristics (T_case = -5 to70℃, VCC = 3.14 to 3.46 Volts)

Notes:

1. Class 1 Laser Safety per FDA/CDRH and IEC-825-1 regulations.
2. With worst-case extinction ratio. Measured with a PRBS 2³¹-1 test pattern, @10.325Gb/s, BER<10^-12 .

Pin Assignment

Pin out of Connector Block on Host Board

Pin Descriptions

Notes:

1. Circuit ground is internally isolated from chassis ground.
2. T_FAULT is an open collector/drain output, which should be pulled up with a 4.7kΩ– 10 kΩ resistor on the host board if intended for use. Pull up voltage should be between 2.0V to Vcc + 0.3V. A high output indicates a transmitter fault caused by either the TX bias current or the TX output power exceeding the preset alarm thresholds. A low output indicates normal operation. In the low state, the output is pulled to <0.8V.
3. Laser output disabled on T_DIS >2.0V or open, enabled on T_DIS <0.8V.
4. Should be pulled up with 4.7kΩ- 10kΩ on host board to a voltage between 2.0V and 3.6V. MOD_ABS pulls line low to indicate module is plugged in.
5. Transceiver data rate selected through the 2-wire bus in accordance with SFF-8472 Rev10.5. Soft RS0 is set at Bit3, Byte 110, Address A2h. Soft RS0 default state on power up is ‘0’ LOW, and the state is reset following a power cycle. Writing ‘1’ HIGH selects max data rate operation. Transceiver data rate is the logic OR of the input state of the RS0 pin and soft RS0 bit. Thus, if either the RS0 pin OR the soft RS0 bit is HIGH then the selected data rate will be 9.95 and 10.3 Gb/s.
6. Loss Of Signal is LVTTL. It should be pulled up with 4.7kΩ – 10kΩ on host board to a voltage between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.

Digital Diagnostic Functions

The SFP+ transceivers support the 2-wire serial communication protocol as defined in the SFP MSA1.

The standard SFP serial ID provides access to identification information that describes the transceiver’s capabilities, standard interfaces, manufacturer, and other information.

Additionally, SFP+ transceivers provide a unique enhanced digital diagnostic monitoring interface, which allows real-time access to device operating parameters such as transceiver temperature, laser bias current, transmitted optical power, received optical power and transceiver supply voltage. It also defines a sophisticated system of alarm and warning flags, which alerts end-users when particular operating parameters are outside of a factory set normal range.

The SFP MSA defines a 256-byte memory map in EEPROM that is accessible over a 2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally defined serial ID memory map remains unchanged.

The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed through a 2-wire serial interface. When the serial protocol is activated, the serial clock signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the SFP transceiver into those segments of the E2PROM that are not write-protected. The negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit data words that can be addressed individually or sequentially.

Digital diagnostics for the YAM-85192-5LS are internally calibrated by default.

Host - Transceiver Interface Block Diagram

Outline Dimensions

Comply to SFF-8432 rev5.0, the improved Pluggable form factor specification.

Regulatory Compliance